Low Power Consumption Tunnel Transistors

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Low Power Consumption Tunnel Transistors

Nanotechnology / Materials

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Katsuhiro Tomioka Associate Professor

Faculty of Information Science and Technology

Hokkaido University Researcher Directory

Realizing next-generation energy-saving devices with new semiconductor interfaces

With this research we proposed and realized an unprecedented low-power FET/tunnel FET by applying a new semiconductor solid-phase interface, which is formed by very small nanowires a few thousandths of a hair’s width, to a switch element.

Content of research

High performance of microprocessors and semiconductor integrated circuits, which are the brains of smartphones and PCs, have been achieved by reducing the size of field-effect transistors (FETs), which are the basic elements, and installing approximately 2 to 3 billion of them. While higher performance is being achieved, the rapid increase in power consumption of these FETs is becoming a serious problem. This is because there is a physical limit (60 mV/digit) on the switching performance (sub-threshold factor) of FETs. To realize drastic energy saving in the future, it is necessary to develop a new switch element that can break through the physical limit on FETs and their practical application. With this research, we have proposed and realized an unprecedented low-power-consumption tunnel FET.

Development of longitudinal tunneling HEMT devices based on III-V/Si solid phase interface
(a) III-V nanowire array on silicon substrate by selective growth technique, (b) schematic diagram of modulated doped core multi-shell nanowires and a cross-sectional TEM image of the fabricated results, (c) TEM image of Si/InGaAs nanowire interface, (d) strain mapping, (e) vertical tunneling HEMT device structure

Potential for social implementation

・Realization of low-power-consumption integrated circuits
・Switch elements for low-voltage circuits
・Sensor devices
・Healthcare devices

Appealing points to industry and local governments

At this laboratory, we have established semiconductor nanowire integration technology using the MOVPE selective growth method, and are applying the new device in a wide range of fields. This research is not only applied to low-voltage transistors, but also to the technology involved in the manufacture of semiconductor nanowires and can be further expanded from the basics of production to joint studies.